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類比至數位轉換器電路
冼世榮; 丁立; 诸嫣; 魏和功; 陈知行; 赵汝法; 余成斌 U; 马 许愿; 马洛贝尔蒂 佛朗哥
2014-07-21
Rights Holder澳門大學
Date Available2014-07-21
Country台灣(中國)
Subtype发明专利
Contribution Rank1
Abstract

本發明提供一種類比至數位轉換器(ADC)電路,其包含兩個時間交錯連續漸近暫存器(SAR)ADC。該兩個時間交錯SAR ADC每一者包含:第一級SAR子ADC;餘數放大器;第二級SAR子ADC;以及數位式錯誤校正邏輯。時間交錯路徑是共用該餘數放大器。該餘數放大器具有低增益,並以次臨界值操作,以達到電力效率高的設計。

Application Date2011-03-08
Patent NumberTWI446723B
Language中文
Status已授权
Application NumberTW100107757
Open (Notice) NumberTWI446723B
Patent Agent林志剛
Fulltext Access
Document TypePatent
CollectionINSTITUTE OF MICROELECTRONICS
THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU)
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation澳門大學
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
冼世榮,丁立,诸嫣,等. 類比至數位轉換器電路. TWI446723B[P]. 2014-07-21.
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