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A 36-Gb/s 1.3-mW/Gb/s duobinary-signal transmitter exploiting power-efficient cross-quadrature clocking multiplexers with maximized timing margin Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 9,Page: 3014-3026
Authors:  Chen Y.;  Mak P.-I.;  Boon C.C.;  Martins R.P.
Favorite | View/Download:9/0 | TC[WOS]:2 TC[Scopus]:0 | Submit date:2019/02/11
Bandwidth (Bw)  Cmos  Cross-quadrature Clocking  D-type Flip-flop (Dff)  Data-dependent Jitter (Ddj)  Duobinary  Figure-of-merit (Fom)  Latch  Multi-level Signaling  Multiplexer (Mux)  Selector  Timing Margin  
Design and Control of An Integrated 3-Level Boost Converter under DCM Operation Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Florence, ITALY, MAY 27-30, 2018
Authors:  Tan Y.;  Lam C.-S.;  Sin S.-W.;  Wong M.-C.;  Martins R.P.
Favorite | View/Download:11/0 | TC[WOS]:1 TC[Scopus]:0 | Submit date:2018/12/23
3-level Boost Converter  Dcm  Fast Transient Response  Low Ripple  Voltage Mode Controller  
A 97.0% maximum efficiency, fast response, low voltage ripple KY boost converter for photovoltaic application Conference paper
Proceedings - 2018 IEEE International Conference on Industrial Electronics for Sustainable Energy Systems, IESES 2018, Hamilton, NEW ZEALAND, JAN 31-FEB 02, 2018
Authors:  Wen H.J.;  Lam C.-S.;  Choi W.-H.;  Wong C.-K.;  Wong M.-C.
Favorite | View/Download:8/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2018/12/23
Dc-dc Boost Converter  Efficiency  Ky Converter  Pulse-width-modulation (Pwm) Control  
DCM operation analysis of 3-level boost converters Journal article
ELECTRONICS LETTERS, 2017,Volume: 53,Issue: 4,Page: 270-272
Authors:  Yi-Wei Tan;  Chi-Seng Lam;  Sai-Weng Sin;  Man-Chung Wong;  Seng-Pan U;  Rui Paulo Martins
Favorite | View/Download:28/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2018/10/30