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Cascade Analog to Digital Converting System Patent
专利类型: 发明专利, 专利号: US8466823B2, 申请日期: 2011-08-05, 公开日期: 2013-06-18
Authors:  U-Fat CHIO;  He-Gong Wei;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo da Silva Martins;  Franco Maloberti
Favorite | View/Download:16/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/06
Delay generator Patent
专利类型: 发明专利, 专利号: US8441295B2, 申请日期: 2011-11-04, 公开日期: 2013-05-14
Authors:  He-Gong Wei;  U-Fat CHIO;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo da Silva Martins
Favorite | View/Download:19/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/26
Time-Inteleaved Piplined-SAR Analog to Digital Converter with Low Power Consumption Patent
专利类型: 发明专利, 专利号: US8427355B2, 申请日期: 2011-09-14,
Authors:  Sai-Weng Sin;  Li Ding;  Yan Zhu;  He-Gong Wei;  Chi-Hang Chan;  U-Fat Chio;  Seng-Pan U;  Rui Paulo da Silva Martins;  Franco Maloberti
Favorite | View/Download:11/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/30
A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS Conference paper
2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, France, 17-21 Sept. 2012
Authors:  Guohe Yin;  He-Gong Wei;  U–Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite | View/Download:14/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
Analgo-to-digital Converter  Successive Approximation Register  Ultra-low Power  Sensor Applications  
A 22.4 μw 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Zhijie Chen;  Yang Jiang;  Chenyan Cai;  He-Gong Wei;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite | View/Download:15/0 | TC[WOS]:6 TC[Scopus]:0 | Submit date:2019/02/11
Σδ Modulator  Sar Quantizer  Passive Analog Adder  
Analog to digital converter circuit Patent
专利类型: 发明专利, 专利号: US20120229313A1, 申请日期: 2011-09-14, 公开日期: 2012-09-13
Authors:  Sai-Weng SIN;  He-Gong WEI;  Franco MALOBERTI;  Li DING;  Yan ZHU;  Chi-Hang CHAN;  U-Fat CHIO;  Seng-Pan U;  Rui Paulo da Silva MARTINS
Favorite | View/Download:11/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/26
ANALOG-TO-DIGITAL CONVERTING SYSTEM Patent
专利类型: 发明专利, 专利号: US20120194364A1, 申请日期: 2011-08-05, 公开日期: 2012-08-02
Authors:  U Fat CHIO;  He Gong Wei;  Yan Zhu;  Sai Weng Sin;  Seng Pan U;  Rui Paulo da Silva Martins;  Franco Maloberti
Favorite | View/Download:2/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2020/06/03
Design and experimental verification of a power effective Flash-SAR subranging ADC Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010,Volume: 57,Issue: 8,Page: 607-611
Authors:  U-Fat Chio;  He-Gong Wei;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins;  Franco Maloberti
Favorite | View/Download:24/0 | TC[WOS]:21 TC[Scopus]:0 | Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Digital Error Correction (Dec)  Flash Adc  Sar Adc  Subranging Adc  
A rapid power-switchable track-and-hold amplifier in 90-nm CMOS Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010,Volume: 57,Issue: 1,Page: 16
Authors:  He-Gong Wei;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite | View/Download:16/0 | TC[WOS]:13 TC[Scopus]:0 | Submit date:2018/10/30
High-accuracy  High-speed  Power Switchable  Track-and-hold (T/h)  
Linearity analysis on a series-split capacitor array for high-speed SAR ADCs Conference paper
2008 51ST MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, Knoxville, TN, AUG 10-13, 2008
Authors:  Yan Zhu;  U-Fat Chio;  He-Gong Wei;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | View/Download:20/0 | TC[WOS]:7 TC[Scopus]:0 | Submit date:2019/02/11