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Novel Low Jitter Multi-Phase Clock Generation Scheme for Parallel Analog-toDigital Conversion Systems Conference paper
Proc. IEEE/IEEJapan International Analog VLSI Workshop – AVLSIWS 2004, University of Macau, Macao, China, Oct 2004
Authors:  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | View/Download:6/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/29
Microstrip Two-Section Dual-Band Impedance Transformer Design with Spurious Matching Suppression Conference paper
Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2005, Hong Kong, China, July 2005.
Authors:  Sio-Weng Ting;  Kam-Weng-Tam;  Rui P. Martins
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Dual-band  Impedance Transformer  Transmission Zero Placement  Spurline  Spurious Matching  
A Pseudo-Differential Comparator-Based Pipelined ADC with Common Mode Feed Forward Technique Conference paper
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), Macao, PEOPLES R CHINA, NOV 30-DEC 03, 2008
Authors:  Li Ding;  Sio Chan;  Kim-Fai Wong;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
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Quantitative Noise Analysis of Jitter-Induced Non-Uniformly Sampled-And-Held Signals Conference paper
2003 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOL VI, PROCEEDINGS: SIGNAL PROCESSING THEORY AND METHODS, HONG KONG, PEOPLES R CHINA, MAY 25-28, 2003
Authors:  Sui-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite | View/Download:4/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/27
Signal Analysis  Dynamic Range  1f Noise  Filtering  Jitter  Frequency  Sampling Methods  Signal To Noise Ratio  Filters  Clocks  
A Novel Low-Voltage Cross-Coupled Passive Sampling Branch for Reset- and Switched-Opamp Circuits Conference paper
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, Kobe, JAPAN, MAY 23-26, 2005
Authors:  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
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Sampling Methods  Switched Capacitor Circuits  Signal Processing  Transient Analysis  Silicon Compounds  Switching Circuits  Switches  Circuit Simulation  Threshold Voltage  Signal Design  
A self-timing switch-driving register by precharge-evaluate logic for high-speed SAR ADCs Conference paper
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, Macao, PEOPLES R CHINA, NOV 30-DEC 03, 2008
Authors:  Chio U.-F.;  Wei H.-G.;  Zhu Y.;  Sin S.-W.;  Seng-Pan U.;  RPMartins
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Time interleaved current steering DAC for ultra-high conversion rate Conference paper
Conference Proceedings - 10th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2014, Grenoble, FRANCE, JUN 29-JUL 03, 2014
Authors:  Feng D.;  Sin S.-W.;  Bonizzoni E.;  Maloberti F.
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An analytical linearization method for CMOS MMIC power amplifier using multiple gated transistors Conference paper
International Conference on ASIC, Proceedings, SHANGHAI, PEOPLES R CHINA, OCT 23-25, 2001
Authors:  Weng S.S.;  Chong L.K.;  Vai C.K.;  Wa C.W.;  Tam K.W.;  Martins R.P.
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Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, BANGKOK, THAILAND, MAY 25-28, 2003
Authors:  Sin S.-W.;  Martins R.P.;  Franca J.E.;  Seng-Pan U
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Spectra analysis of nonuniformly holding signals for time-interleaved systems with timing mismatches Conference paper
Conference Record - IEEE Instrumentation and Measurement Technology Conference, VAIL, CO, MAY 20-22, 2003
Authors:  Sin S.-W.;  Martins R.P.;  U, SP
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Signal Analysis  Timing  Signal Processing  Frequency  Clocks  Signal Sampling  Jitter  Silicon Compounds  Closed-form Solution  Error Analysis  
A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kobe, JAPAN, MAY 23-26, 2005
Authors:  Sin S.-W.;  U S.-P.;  Martins R.P.
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A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kos, GREECE, MAY 21-24, 2006
Authors:  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
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A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kos, GREECE, MAY 21-24, 2006
Authors:  Ma J.-X.;  Sin S.-W.;  U S.-P.;  Martins R.P.
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A power scalable 6-bit 1.2GS/s flash ADC with power on/off track-and-hold and preamplifier Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Seattle, WA, MAY 18-21, 2008
Authors:  Wei H.-G.;  Chio U.-F.;  Zhu Y.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
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A Process- and temperature- insensitive current-controlled delay generator for sampled-data systems Conference paper
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, Macao, PEOPLES R CHINA, NOV 30-DEC 03, 2008
Authors:  Wei H.-G.;  Chio U.-F.;  Zhu Y.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
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Linearity analysis on a series-split capacitor array for high-speed SAR ADCs Conference paper
2008 51ST MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, Knoxville, TN, AUG 10-13, 2008
Authors:  Yan Zhu;  U-Fat Chio;  He-Gong Wei;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
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A power-efficient capacitor structure for high-speed charge recycling SAR ADCs Conference paper
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, 31 Aug.-3 Sept. 2008
Authors:  Zhu Y.;  Chio U.-F.;  Wei H.-G.;  Sin S.-W.;  Upa S.-P.;  Martins R.P.
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Parasitic calibration by two-step ratio approaching techinque for split capacitor array SAR ADCs Conference paper
2009 International SoC Design Conference, ISOCC 2009, Busan, South Korea, 22-24 Nov. 2009
Authors:  Wong S.-S.;  Zhu Y.;  Chan C.-H.;  Chio U.-F.;  Sin S.-W.;  U S.-P.;  Martins R.P.
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Analog-to-digital Converter (Adc)  Offset Calibration  Parasitic Calibration  Split Capacitor Array  Sucessive Approximation Register (Sar)  
On-chip small capacitor mismatches measurement technique using beta-multiplier-biased ring oscillator Conference paper
Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009, Taipei, TAIWAN, NOV 16-18, 2009
Authors:  Sin S.-W.;  Wei H.-G.;  Chio U.-F.;  Zhu Y.;  Seng-Pan U.;  Martins R.P.;  Maloberti F.
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Beta Multiplier And Constant Gm  Capacitor Mismatches Measurement  Ring Oscillator  
A voltage-controlled capacitance offset calibration technique for high resolution dynamic comparator Conference paper
2009 International SoC Design Conference, ISOCC 2009, Busan, South Korea, 22-24 Nov. 2009
Authors:  Chan C.-H.;  Zhu Y.;  Chio U.-F.;  Sin S.-W.;  U S.P.;  Martins R.P.
Favorite | View/Download:13/0 | TC[WOS]:10 TC[Scopus]:0 | Submit date:2019/02/11
Dynamic Comparator  Offset Calibration