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A CMOS Delta-Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 7,Page: 1716-1725
Authors:  Huang M.;  Chen D.;  Guo J.;  Ye H.;  Xu K.;  Liang X.;  Lu Y.
Favorite | View/Download:14/0 | TC[WOS]:9 TC[Scopus]:0 | Submit date:2019/02/14
Delta-sigma Phase Locked Loop (Pll)  Modulation Bandwidth Calibration  Transmitters  
A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2014,Volume: 61,Issue: 11,Page: 3085-3093
Authors:  Chen D.G.;  Tang F.;  Law M.-K.;  Zhong X.;  Bermak A.
Favorite | View/Download:11/0 | TC[WOS]:28 TC[Scopus]:0 | Submit date:2019/02/14
Cmos Image Sensor (Cis)  Column-parallel Sar Adc  Correlated Double Sampling (Cds)  Error Correction  Single-ended Adc  
A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 4,Page: 1025-1032
Authors:  Chak-Fong Cheang;  Ka-Fai Un;  Wei-Han Yu;  Pui-In Mak;  Rui P. Martins
Favorite | View/Download:8/0 | TC[WOS]:8 TC[Scopus]:0 | Submit date:2019/02/11
Cmos  Counter-intermodulation (Cim)  Digital Predistortion (Dpd)  Frequency-dependent I/q Imbalance  Power Amplifier (Pa)  Rf  Volterra Series  Wideband Transmitter  
Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 9,Page: 2196-2206
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite | View/Download:11/0 | TC[WOS]:16 TC[Scopus]:0 | Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Reference Noise  Successive-approximation-register (Sar) Adc  Thermal Noise  
A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite | View/Download:19/0 | TC[WOS]:9 TC[Scopus]:0 | Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Low Power  Successive Approximation Architecture  Switched-capacitor Circuits  
Analysis of common-mode interference and jitter of clock receiver circuits with improved topology Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 6,Page: 1819-1829
Authors:  Yang X.;  Zhu Y.;  Chan C.-H.;  Seng-Pan U.;  Martins R.P.
Favorite | View/Download:14/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2019/02/11
Isf  Low Clock Jitter Circuit  Self-bias  
A 36-Gb/s 1.3-mW/Gb/s duobinary-signal transmitter exploiting power-efficient cross-quadrature clocking multiplexers with maximized timing margin Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 9,Page: 3014-3026
Authors:  Chen Y.;  Mak P.-I.;  Boon C.C.;  Martins R.P.
Favorite | View/Download:9/0 | TC[WOS]:2 TC[Scopus]:0 | Submit date:2019/02/11
Bandwidth (Bw)  Cmos  Cross-quadrature Clocking  D-type Flip-flop (Dff)  Data-dependent Jitter (Ddj)  Duobinary  Figure-of-merit (Fom)  Latch  Multi-level Signaling  Multiplexer (Mux)  Selector  Timing Margin  
A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 10,Page: 3196-3206
Authors:  Kong L.;  Chen Y.;  Boon C.C.;  Mak P.-I.;  Martins R.P.
Favorite | View/Download:10/0 | TC[WOS]:2 TC[Scopus]:0 | Submit date:2019/02/11
Automatic Gain Control (Agc) Amplifier  Bipolar Junction Transistors (Bjts)  Cmos  Db-linear  Dynamic Range  Negative Exponential Generator (Neg)  Pseudo-exponential Function  Rational Approximation  Taylor Series  
A 220-MHz bondwire-based fully-integrated ky converter with fast transient response under DCM Operation Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3984-3995
Authors:  Zeng W.-L.;  Lam C.-S.;  Sin S.-W.;  Maloberti F.;  Wong M.-C.;  Martins R.P.
Favorite | View/Download:12/0 | TC[WOS]:1 TC[Scopus]:0 | Submit date:2018/12/23
Bondwire Inductor  Boost Converter  Discontinuous Conduction Mode (Dcm)  Fully Integrated Ky Converter  Load Transient Response  Pwm  Voltage Ripple  Zero Current Detection (Zcd)  
A passive RFID tag embedded temperature sensor with improved process spreads immunity for a-30̂C to 60̂C sensing range Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2014,Volume: 61,Issue: 2,Page: 337
Authors:  Wang B.;  Law M.-K.;  Bermak A.;  Luong H.C.
Favorite | View/Download:18/0 | TC[WOS]:39 TC[Scopus]:0 | Submit date:2018/10/30
Cmos Temperature Sensors  Passive Rfid Tags  Process Compensation  Time-domain Conversion (Tdc)  
A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 3,Page: 707
Authors:  Lu Y.;  Wang Y.;  Pan Q.;  Ki W.-H.;  Yue C.P.
Favorite | View/Download:18/0 | TC[WOS]:69 TC[Scopus]:0 | Submit date:2018/10/30
Amplifier  Flipped Voltage Follower  Low Dropout Regulator (Ldo)  Power Supply Rejection (Psr)