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A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR with Fully-Digital Timing-Skew Calibration Based on Digital-Mixing
Guo,Mingqiang1,2; Mao,Jiaji1,2; Sin,Sai Weng1,2; Wei,Hegong3; Martins,R. P.1,2,4
2019-06-01
Conference NameSymposium on VLSI Technology / 33rd Symposium on VLSI Circuits
Source PublicationIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2019-June
PagesC76-C77
Conference DateJUN 09-14, 2019
Conference PlaceKyoto, JAPAN
Abstract

This paper presents a 5GS/s 16-way Time-Interleaved SAR ADC in 28nm CMOS, proposing a fully-digital background timing-skew calibration based on digital mixing, without adding any extra analog circuits. We implement the sub-channel SAR with a splitting-combined monotonic switching procedure. The prototype ADC achieves 48.5dB SNDR at Nyquist rate, while the power consumption is 29mW leading to a Walden FOM of 26.7fJ/conv-step.

DOI10.23919/VLSIC.2019.8778077
URLView the original
Indexed ByCPCI-S
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000531736500026
Scopus ID2-s2.0-85073906848
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Cited Times [WOS]:9   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
INSTITUTE OF MICROELECTRONICS
Corresponding AuthorSin,Sai Weng
Affiliation1.State-Key Laboratory of Analog and Mixed-Signal VLSI,Institute of Microelectronics-IME,Macao
2.DECE/FST,University of Macau,Macao
3.University of Texas at Austin,Austin,United States
4.On Leave from Instituto Superior Tecnico,Universidade de Lisboa,Portugal
First Author AffilicationFaculty of Science and Technology
Corresponding Author AffilicationFaculty of Science and Technology
Recommended Citation
GB/T 7714
Guo,Mingqiang,Mao,Jiaji,Sin,Sai Weng,et al. A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR with Fully-Digital Timing-Skew Calibration Based on Digital-Mixing[C],2019:C76-C77.
APA Guo,Mingqiang,Mao,Jiaji,Sin,Sai Weng,Wei,Hegong,&Martins,R. P..(2019).A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR with Fully-Digital Timing-Skew Calibration Based on Digital-Mixing.IEEE Symposium on VLSI Circuits, Digest of Technical Papers,2019-June,C76-C77.
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