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A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise
Zhao,Qiang1; Zheng,Wenhan1; Zhao,Xiaojin1; Cao,Yuan2; Zhang,Feng3; Law,Man Kay4

In this paper, we present a fully reconfigurable resistive random access memory (RRAM) physical unclonable function (PUF) based on the truly random dynamic entropy of the ubiquitous jitter noise, which is intrinsically different from most previously demonstrated PUF implementations with semiconductor fabrication's process variation as the static entropy source. In addition, the proposed RRAM PUF is operated by configuring the mainstream RRAM cells to either high resistance state (for '1') or low resistance state (for '0'), according to the customized ring oscillator (RO) true random number generator's digital output that is determined by the random jitter noise. By completely removing the need of dedicated split resistance circuitry (SRC) in existing RRAM PUFs, the proposed implementation is fully compatible with the SET/RESET operations of the RRAM array for mainstream memory applications, leading to minimized design overhead and enhanced reliability without SRC-caused error bits. Fabricated using 130 nm standard complementary-metal-oxide-semiconductor (CMOS) process plus post-processing dedicated to the RRAM devices, the proposed RRAM PUF cell features an ultra-compact footprint of 1.82μm2 (i.e., 108 F2), which is capable of generating 107 PUF bits per cell due to the time-variant property of jitter noise and the full reconfigurability of the RRAM PUF. This significantly innovates all the previous weak PUF implementations based on the static entropy source of process variation, where the maximum bit number per PUF cell is always limited and fixed after the chip fabrication. Meanwhile, ultra-low native unstable bits of 0.28% and bit error rate (BER) per 10°C of 0.03% can be achieved for the fabricated RRAM PUF. Moreover, by passing the widely-adopted bias test, National Institute of Standards and Technology (NIST) test and autocorrelation function (ACF) test under various VT conditions, the true randomness of the customized RO TRNG' dynamic entropy is validated using 65 nm standard CMOS process. Compared with the state-of-the-art weak PUF implementations, the native unstable bits is improved by 5.36× and the BER per 10°C is improved by 4× even under the widest operating temperature range from-50°C to 150°C.

KeywordDynamic Entropy Source Full Reconfigurability High Reliability Physical Unclonable Function Resistive Random Access Memory True Random Number Generator
URLView the original
Indexed BySCIE
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000583739900022
Scopus ID2-s2.0-85095719456
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Cited Times [WOS]:15   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
Corresponding AuthorZhao,Xiaojin
Affiliation1.College of Electronics and Information Engineering,Shenzhen University,Shenzhen,518060,China
2.College of IoT Engineering,Hohai University,Changzhou,213022, China,China
3.Institute of Microelectronics,Chinese Academy of Sciences,Beijing,100029,China
4.State Key Laboratory of Analog and Mixed-Signal,VLSI,Institute of Microelectronics,FST-ECE,University of Macau,Taipa,Macao
Recommended Citation
GB/T 7714
Zhao,Qiang,Zheng,Wenhan,Zhao,Xiaojin,et al. A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,2020,67(11):3866-3879.
APA Zhao,Qiang,Zheng,Wenhan,Zhao,Xiaojin,Cao,Yuan,Zhang,Feng,&Law,Man Kay.(2020).A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,67(11),3866-3879.
MLA Zhao,Qiang,et al."A 108 F2/Bit Fully Reconfigurable RRAM PUF Based on Truly Random Dynamic Entropy of Jitter Noise".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 67.11(2020):3866-3879.
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