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A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR
Liao, Qiwen1,2; Zhang, Yuguang3,4; Ma, Siyuan1; Wang, Lei3,4; Li, Leliang1; Li, Guike1; Zhang, Zhao1; Liu, Jian1; Wu, Nanjian1; Liu, Liyuan1; Chen, Yong5; Xiao, Xi3,4; Qi, Nan1,2
2022-03-01
Source PublicationIEEE Journal of Solid-State Circuits
ISSN0018-9200
Volume57Issue:3Pages:767-780
Abstract

This article presents a 50-Gb/s optical transmitter (TX), consisting of a 40-nm distributed CMOS driver and a 180-nm silicon-photonic modulator. A lumped-segment Mach-Zehnder modulator (LS-MZM) is developed for high bandwidth (BW) four-level pulse amplitude (PAM-4) modulation. A multi-segment driver with limiting outputs is co-designed, which is distributed into each LS-MZM segment. By grouping these LS-MSM segments in a thermometer code, high-linearity modulation is realized without the need of power-hungry high-swing linear drivers. To improve the optical PAM-4 signal integrity, in-segment multiplexing along with clock phase interpolation is adopted to synchronize the electrical and optical signals across all segments. The hybrid coupling between the driver and modulator is devised to boost the BW of the high-speed data path, while a half-rate clock and data recovery (CDR) circuit is integrated to remove the accumulated jitter. Measurements show that the TX exhibits an extinction ratio (ER) of up to 9.8 dB and a 0.99 ratio of the level mismatch. A figure-of-merit (FoM) of 1.39 pJ/bit/dB corresponds to a 682-mW power, which can be further reduced by 40%, at the cost of a degraded ER of 4 dB. The PAM-4 CDR helps to achieve < 10^{-12} BER and >0.1- {U}I_{mathrm {pp}} jitter tolerance (JTOL) from 10 to 100 MHz.

KeywordClock And Data Recovery (Cdr) Cmos Distributed Driver Four-level Pulse Amplitude (Pam-4) Machâ Zehnder Modulator (Mzm) Optical Digital-to-analog Converter (Dac) Silicon Photonic (Siph) Transmitter (Tx)
DOI10.1109/JSSC.2021.3134874
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000761214100014
Scopus ID2-s2.0-85122312648
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Cited Times [WOS]:6   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
CollectionINSTITUTE OF MICROELECTRONICS
Corresponding AuthorXiao, Xi; Qi, Nan
Affiliation1.State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100083, China
2.Center of Material Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing, 100049, China
3.National Optoelectronics Innovation Center (NOEIC), State Key Laboratory of Optical Communication Technologies and Networks, China Information and Communication Technologies Group Corporation (CICT), Wuhan, 430074, China
4.Peng Cheng Laboratory, Shenzhen, 518055, China
5.State Key Laboratory of Analog and Mixed-Signal VLSI and IME, ECE-FST, University of Macau, Taipa, Macao
Recommended Citation
GB/T 7714
Liao, Qiwen,Zhang, Yuguang,Ma, Siyuan,et al. A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR[J]. IEEE Journal of Solid-State Circuits,2022,57(3):767-780.
APA Liao, Qiwen,Zhang, Yuguang,Ma, Siyuan,Wang, Lei,Li, Leliang,Li, Guike,Zhang, Zhao,Liu, Jian,Wu, Nanjian,Liu, Liyuan,Chen, Yong,Xiao, Xi,&Qi, Nan.(2022).A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR.IEEE Journal of Solid-State Circuits,57(3),767-780.
MLA Liao, Qiwen,et al."A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR".IEEE Journal of Solid-State Circuits 57.3(2022):767-780.
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