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A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components Journal article
Sensors (Basel, Switzerland), 2022,Volume: 22,Issue: 15
Authors:  Zhang, Mengdi;  Zhao, Ye;  Chen, Yong;  Crovetti, Paolo;  Wang, Yanji;  Ning, Xinshun;  Qiao, Shushan
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/09/07
Analog-to-digital Converter (Adc)  Differential Nonlinearity (Dnl)  Effective Number Of Bits (Enob)  Fpga  Integral Nonlinearity (Inl)  Time-to-digital Converter (Tdc)  
A 108-nW 0.8-mm 2 Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 11,Page: 1-10
Authors:  Chen, Feifei;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In;  Martins, Rui P.
Adobe PDF | Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/07/22
Approximate Computing  Convolutional Neural Network (Cnn)  Feature Extraction  Keyword Spotting (Kws)  Quantization  Reconfigurable  Sparsity  Switched-capacitor Circuits  Voice Activity Detection (Vad)  
A Fast Transient FVF as Reference Buffer and a High PSRR LDO for SAR ADC Thesis
Master of Philosophy in Electrical and Computer Engineering, University of Macau, Macau, China: University of Macau, 2022
Authors:  Yi Zeng
Favorite |  | Submit date:2022/09/05
A 12-Bit 50 MS/s Split-CDAC-Based SAR ADC Integrating Input Programmable Gain Amplifier and Reference Voltage Buffer Journal article
Electronics (Switzerland), 2022,Volume: 11,Issue: 12
Authors:  Xu, Zhuofan;  Hu, Biao;  Wu, Tianxiang;  Yao, Yuting;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/08/02
Asynchronous Sar Adc  Input Pga  Rv-buffer  Split Cdac  
English textbook selection in Taiwan: Voices of two book sales representatives Journal article
Education Research International, 2022,Volume: 2022,Page: 1-6
Authors:  Barry Lee Reynolds;  Xuan Van Ha;  Melissa H. Yu
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/06/07
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 5,Page: 1480-1491
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/05/13
Amplifier Linearity Enhancement  Analog-to-digital Converter (Adc)  Background Offset Calibration  Digital Reconstruction Filter  Dwa  Energy And Area Efficient  Inherent Gain Error Tolerant  Inter-stage Gain Error  Noise Shaping (Ns)  Oversampling  Partial Interleaving  Pipelined Successive Approximation (Sar)  Quantization Leakage Error  
Theoretical total harmonic distortion evaluation based on digital to analogue converter mismatch to improve the linearity of successive approximation register analogue to digital converter Journal article
IET Circuits, Devices and Systems, 2022,Volume: 16,Issue: 2,Page: 189-199
Authors:  Dong, Li;  Song, Yan;  Zhang, Bing;  Lan, Zhechong;  Xin, Youze;  Liu, Liheng;  Li, Ken;  Wang, Xiaofei;  Geng, Li
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/03/28
Analog-to-digital Converter  Dynamic Element Matching  Successive Approximation Register  Time-based Integral Error  Total Harmonic Distribution  
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Calibrations Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 3,Page: 745-756
Authors:  Zhang, Yanbo;  Zhang, Jin;  Liu, Shubin;  Ding, Ruixue;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/03/28
Analog-to-digital Converter (Adc)  Inter-stage Gain And Offset Calibrations  Noise-shaping (Ns)  Split Adc  Successive Approximation Register (Sar)-assisted Pipeline  
A 10-MHz to 50-GHz low-jitter multiphase clock generator for high-speed oscilloscope in 0.15-μm GaAs technology Journal article
International Journal of Circuit Theory and Applications, 2022,Volume: 50,Issue: 2,Page: 367-381
Authors:  Wu, Tianxiang;  Wang, Xi;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/03/04
Spectral and energy efficiency for uplink massive MIMO systems with mixed-ADC architecture Journal article
Physical Communication, 2022,Volume: 50
Authors:  Tan, Weiqiang;  Li, Shidang;  Zhou, Meng
Favorite |  | TC[WOS]:2 TC[Scopus]:2 | Submit date:2022/03/04
Analog-to-digital Converter  Energy Efficiency  Maximum Ratio Combining  Mixed Architecture  Multiuser Massive Mimo  Spectral Efficiency