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Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
Authors:  Guo, Mingqiang;  Sin, Sai Weng;  Qi, Liang;  Xu, Dengke;  Wang, Guoxing;  Martins, Rui P.
Adobe PDF | Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/05/17
Adc  Background  Bandwidth  Calibration  Calibration.  Clocks  Finite Impulse Response Filters  Time-interleaved  Timing  Timing Mismatch  Tuning  Very Large Scale Integration  
Background Timing-Skew Mismatch Calibration for Time-Interleaved ADCs Conference paper
Proceedings - International SoC Design Conference 2021, ISOCC 2021, Jeju Island, Korea, Republic of, 06-09 October 2021
Authors:  Guo, Mingqiang;  Sin, Sai Weng;  Martins, Rui P.
Adobe PDF | Favorite |  | TC[WOS]:0 TC[Scopus]:2 | Submit date：2022/05/13
Adc  Background Calbration  Mismatch Calibration  Time-interleaved Converter  Timing Mismatch  
A 5 GS/s 29 mW Interleaved SAR ADC with 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications Journal article
IEEE Access, 2020,Volume: 8,Page: 138944-138954
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Adobe PDF | Favorite |  | TC[WOS]:8 TC[Scopus]:11 | Submit date：2021/03/09
Analog-to-digital Converter (Adc)  Digital Background Calibration  Digital-mixing  Time-interleaved (Ti) Adc  Timing Mismatch  
A 1.6GS/s 12.2mW 7/8-way Split Time-Interleaved SAR ADC achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration Journal article
IEEE Journal of Solid-State Circuits, 2020,Page: 693-705
Authors:  Guo, M.;  Mao, J.;  Sin,SS. W.;  Wei, H.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/01/25
Calibration  Timing  Clocks  Impedance  Signal To Noise Ratio  Channel Estimation  Jitter  
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 3,Page: 693-705
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Adobe PDF | Favorite |  | TC[WOS]:30 TC[Scopus]:34 | Submit date：2021/03/04
Analog-to-digital Converter (Adc)  Digital Background Calibration  Split Adc  Time-interleaved (Ti) Adc  Timing-skew Mismatch  
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR With Digital Background Timing Mismatch Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020,Volume: 55,Issue: 3,Page: 693-705
Authors:  Mingqiang Guo;  Jiaji Mao;  Sai-Weng Sin;  Hegong Wei;  Rui P. Martins
Favorite |  | TC[WOS]:30 TC[Scopus]:33 | Submit date：2022/08/20
Analog-to-Digital Converter (Adc), Digital Background CalibraTion, Split Adc, Time-interleaved (Ti) Adc, Timing-skew Mismatch  
A 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration Conference paper
Proc. of IEEE Custom Integrated Circuits Conference – CICC
Authors:  Guo, M.;  Mao, J.;  Sin, S. W.;  Wei, H.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/01/25
SAR analog-to-digital converter (ADC)  time-interleaved (TI) ADC  timing-skew calibration  split ADC  background mismatch calibration  
Split-Based Time-interleaved ADC with Digital Background Timing-skew Calibration Conference paper
Giardini Naxos - Taormina, Italy, 12-15 June 2017
Authors:  Guo Mingqiang;  Sin Sai-Weng;  U Seng-Pan;  Rui P. Martins
Adobe PDF | Favorite |  | TC[WOS]:0 TC[Scopus]:6 | Submit date：2022/08/20
Adc, Converters, Digital Background Calibration, Time-interleaving, split-Adc, Timing.