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A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 3,Page: 767-780
Authors:  Liao, Qiwen;  Zhang, Yuguang;  Ma, Siyuan;  Wang, Lei;  Li, Leliang;  Li, Guike;  Zhang, Zhao;  Liu, Jian;  Wu, Nanjian;  Liu, Liyuan;  Chen, Yong;  Xiao, Xi;  Qi, Nan
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/03/28
Clock And Data Recovery (Cdr)  Cmos  Distributed Driver  Four-level Pulse Amplitude (Pam-4)  Machâ Zehnder Modulator (Mzm)  Optical Digital-to-analog Converter (Dac)  Silicon Photonic (Siph)  Transmitter (Tx)  
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022,Volume: 30,Issue: 2,Page: 238-242
Authors:  Yang, Zunsong;  Chen, Yong;  Yuan, Jia;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/03/04
Binary Frequency Shift Keying (Bfsk)  Frequency-locked Loop (Fll)  Integer-n  Phase Detector (Pd)  Phase Noise (Pn)  Phase-locked Loop (Pll)  Push-pull  Reference (Ref) Spur  Sub-sampling (Ss)  Voltage-controlled Oscillator (Vco)  
Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 2,Page: 495-505
Authors:  Liu, Yueduo;  Bao, Rongxin;  Zhu, Zihao;  Yang, Shiheng;  Zhou, Xiong;  Li, Qiang;  Liu, Yueduo;  Bao, Rongxin;  Zhu, Zihao;  Yang, Shiheng;  Zhou, Xiong;  Li, Qiang;  Yin, Jun;  Mak, Pui In
Favorite |  | TC[WOS]:1 TC[Scopus]:0 | Submit date:2022/03/04
Clocks  Delays  Jitter  Performance Evaluation  Phase Noise  Topology  Voltage-controlled Oscillators  
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 1,Page: 51-63
Authors:  Chen, Peng;  Meng, Xi;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.;  Staszewski, Robert Bogdan
Favorite |  | TC[WOS]:1 TC[Scopus]:0 | Submit date:2021/09/20
Adpll  Bandwidth  Bluetooth Le (bLe)  Circuit Stability  Dco  Dtc  Fractional-n Pll  Gain  Inverse-class-f  Jitter  Low Power  Oscillators  Phase Locked Loops  Phase Noise (Pn)  Quantization (Signal)  Tdc  The Iot.  
A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 1,Page: 172-185
Authors:  Guo, Hao;  Chen, Yong;  Yang, Chaowei;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:2 TC[Scopus]:1 | Submit date:2021/09/20
1/f³  Phase Noise Corner  Cmos  Common-mode (Cm)  Differential-mode (Dm)  Figure-of-merit (Fom)  Flicker (1/f) Noise  Harmonic Analysis  Impulse Sensitivity Function (Isf)  Inductance  Inductor-capacitor (Lc) Tank  Inductors  Mos Devices  Resistance  Resistor-inductor-capacitor-mutual Inductance (Rlcm).  Resistors  Thermal Noise  Voltage-controlled Oscillator (Vco)  Voltage-controlled Oscillators  
A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation Journal article
IEEE Journal of Solid-State Circuits, 2021,Volume: 56,Issue: 8,Page: 2375-2387
Authors:  Jiang, Dongyang;  Qi, Liang;  Sin, Sai Weng;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:1 TC[Scopus]:2 | Submit date:2021/09/20
Analog-to-digital Converter (Adc)  Data Weighting Average (Dwa)  Delta-sigma Modulator (Dsm)  Digital Bank Filters  Digital-to-analog Converter (Dac)  Discrete-time (Dt)  Dithering  Dynamic Element Matching (Dem)  Extrapolation  Noise-coupling  Time-domain Analysis  Time-interleaved (Ti)  
A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021,Volume: 68,Issue: 6,Page: 2307-2316
Authors:  Yang, Zunsong;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:5 TC[Scopus]:5 | Submit date:2021/09/20
CMOS  current-reuse sampling phase detector (CRS-PD)  integrated jitter  loop filter (LF)  master-slave sampling filter (MSSF)  master-slave sampling phase detector (MSS-PD)  phase noise (PN)  Phase-locked loop (PLL)  reference spur  ring voltage-controlled oscillator (VCO)  type-I  type-II  
A 3.52-GHz harmonic-rich-shaping VCO with noise suppression and circulation achieving -151-dBc/Hz phase noise at 10-MHz Offset Conference paper
Analog Circuits I
Authors:  Huang, Y.;  Chen, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
CMOS  VCO  Harmonic  
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS Journal article
IEEE Access, 2021,Volume: 9,Page: 77545-77554
Authors:  Li, Manxin;  Yao, Yuting;  Hu, Biao;  Wei, Jipeng;  Chen, Yong;  Ma, Shunli;  Ye, Fan;  Ren, Junyan
Favorite |  | TC[WOS]:3 TC[Scopus]:2 | Submit date:2021/10/28
Asynchronous Logic  Cmos  Customized Unit Capacitor  Figure-of-merit (Fom)  Split-cdac  Successive Approximation Register (Sar) Analog-to-digital Converter (Adc)  
A 3.52-GHz harmonic-rich-shaping VCO with noise suppression and circulation, achieving −151-dBC/Hz phase noise at 10-MHz offset Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Daegu, Korea, 22-28 May 2021
Authors:  Huang, Yunbo;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/09/20
1/f3 Pn Corner  Cmos  Figure-of-merit (Fom)  Flicker (1/f) Noise  Harmonic Rich Shaping  Impulse Sensitivity Function (Isf)  Noise Suppression And Circulation  Noise Transfer  Phase Noise (Pn)  Quality Factor  Supply Pushing  Thermal Noise  Transformer  Tuning Range (Tr)  Voltage-controlled Oscillator (Vco)