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Primary frequency regulation scheme applicable to LCC – VSC series hybrid HVDC considering AC voltage stability at receiving end Journal article
International Journal of Electrical Power and Energy Systems, 2022,Volume: 140
Authors:  Liu, Bo;  Chen, Zhong;  Yang, Shaohua;  Wang, Yi;  Yang, Kai;  Lu, Chen
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/05/13
AC voltage stability  Droop control  equivalent DC input resistance  Inertia emulation  Primary frequency regulation  Series hybrid HVDC  
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Code-Counter-Based Offset Calibration Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 5,Page: 1480-1491
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
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Amplifier linearity enhancement  Analog-to-digital converter (ADC)  Background offset calibration  Digital reconstruction filter  DWA  Energy and area efficient  Inherent gain error tolerant  Inter-stage gain error  Noise shaping (NS)  Oversampling  Partial interleaving  Pipelined successive approximation (SAR)  Quantization leakage error  
A Fusion Topology of Higher Efficiency and Lower Capacity Hybrid Parallel Multi-Converters for Power Quality Compensation Journal article
IEEE Transactions on Power Electronics, 2022,Volume: 37,Issue: 5,Page: 5957-5969
Authors:  Pang, Ying;  Xiang, Zeng;  Bai, Ziyi;  Wang, Lei;  Wong, Chi Kong;  Lam, Chi Seng;  Ma, Fujun;  Wong, Man Chung
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Hardware-in-the-loop (HIL)  multiconverter  power loss  power quality  real-time digital simulator (RTDS)  
A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 3,Page: 767-780
Authors:  Liao, Qiwen;  Zhang, Yuguang;  Ma, Siyuan;  Wang, Lei;  Li, Leliang;  Li, Guike;  Zhang, Zhao;  Liu, Jian;  Wu, Nanjian;  Liu, Liyuan;  Chen, Yong;  Xiao, Xi;  Qi, Nan
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/03/28
Clock And Data Recovery (Cdr)  Cmos  Distributed Driver  Four-level Pulse Amplitude (Pam-4)  Machâ Zehnder Modulator (Mzm)  Optical Digital-to-analog Converter (Dac)  Silicon Photonic (Siph)  Transmitter (Tx)  
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 1,Page: 51-63
Authors:  Chen, Peng;  Meng, Xi;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.;  Staszewski, Robert Bogdan
Favorite |  | TC[WOS]:1 TC[Scopus]:0 | Submit date:2021/09/20
Adpll  Bandwidth  Bluetooth Le (bLe)  Circuit Stability  Dco  Dtc  Fractional-n Pll  Gain  Inverse-class-f  Jitter  Low Power  Oscillators  Phase Locked Loops  Phase Noise (Pn)  Quantization (Signal)  Tdc  The Iot.  
A 13-Bit ENOB Third-Order Noise-Shaping SAR ADC Employing Hybrid Error Control Structure and LMS-Based Foreground Digital Calibration Journal article
IEEE Journal of Solid-State Circuits, 2022
Authors:  Zhang, Qihui;  Ning, Ning;  Zhang, Zhong;  Li, Jing;  Wu, Kejun;  Chen, Yong;  Yu, Qi
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/05/17
Analog-to-digital converter (ADC)  Calibration  Capacitors  Delays  dither-based digital calibration  Finite impulse response filters  hybrid error control structure  Noise shaping  noise shaping (NS)  Quantization (signal)  successive approximation register (SAR).  Topology  
A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm2Current Density Hybrid SC-Parallel-Inductor Buck Converter with Reduced Inductor Current in 65nm CMOS Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Cai, Guigang;  Lu, Yan;  Martins, Rui
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A 12 V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching Journal article
IEICE Electronics Express, 2021,Volume: 18,Issue: 22
Authors:  Zhang, Xiongjie;  Ma, Qiaobo;  Jiang, Yang;  Law, Man Kay;  Mak, Pui In;  Martins, Rui P.
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DCR loss reduction  Dual-path  High step-down  Hybrid buck converter  Zero-voltage switching  
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range Journal article
IEICE Electronics Express, 2021,Page: 1-6
Authors:  Ma, Q;  Zhang, X;  Jiang, Y.;  Hata, K;  Takamiya, M;  Law, M. K.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
DC-DC converter  DCR loss  hybrid topology  multi-path  switched-capacitor  voltage conversion range  
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching Journal article
IEICE Electronics Express, 2021,Page: 1-6
Authors:  Zhang, X;  Ma, Q;  Jiang, Y.;  Law, M. K.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
hybrid buck converter  zero-voltage switching  high step-down  dual-path  DCR loss reduction