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A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 1,Page: 51-63
Authors:  Chen, Peng;  Meng, Xi;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.;  Staszewski, Robert Bogdan
Favorite |  | TC[WOS]:3 TC[Scopus]:2 | Submit date：2021/09/20
Adpll  Bandwidth  Bluetooth Le (bLe)  Circuit Stability  Dco  Dtc  Fractional-n Pll  Gain  Inverse-class-f  Jitter  Low Power  Oscillators  Phase Locked Loops  Phase Noise (Pn)  Quantization (Signal)  Tdc  The Iot.  
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-distorter (DAAPD) Reconfigurable Linearization Technique Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021,Volume: 68,Issue: 11,Page: 3381-3385
Authors:  Mariappan, Selvakumar;  Rajendran, Jagadheswaran;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date：2021/09/20
Adjacent Channel Leakage Ratio (Aclr) And Error Vector Magnitude (Evm)  Back-off Output Power (Pbo)  Cmos  Digitally-assisted Analog Predistorter (Daapd)  Long Term Evolution  Long-term Evolution (Lte).  Power Amplifier (Pa)  Power Amplifiers  Power Generation  Power-added Efficiency (Pae)  Transconductance  Transistors  Tuning  Voltage Control  
A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors Journal article
IEEE Journal of Solid-State Circuits, 2021
Authors:  Mao, Xiangyu;  Lu, Yan;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/05/13
Active Voltage Positioning (Avp)  Control Systems  Dual Loop  Fast Response  Low-dropout (Ldo) Regulator  Power Transistors  Pulse Width Modulation  Pulsewidth Modulation (Pwm) Control  Regulation  Switches  Switching Circuits  Switching Ldo Regulator.  Voltage Control  
A Calibration-Free Ring-Oscillator PLL with Gain Tracking Achieving 9% Jitter Variation over PVT Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3753-3763
Authors:  Yang,Xiaofeng;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui Paulo
Favorite |  | TC[WOS]:4 TC[Scopus]:4 | Submit date：2021/03/04
Calibration-free  Discrete-time  Gain Tracking  Jitter  Open-loop  Phase Noise Cancellation (Pnc)  Phase-locked Loop (Pll)  Pvt  Reference Spur  Ring Voltage-controlled Oscillator (Rvco)  
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC with <1.5-ps Uncalibrated Quantization Steps Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 12,Page: 3225-3235
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:10 TC[Scopus]:8 | Submit date：2021/03/04
Analog-to-digital Converter (Adc)  And Temperature (Pvt) Robustness  High-speed Adc  Metastability  Process  Supply Voltage  Time Interpolation  Time Residue  Time-domain Adc  Time-to-digital Converter (Tdc)  
An 11-bit 100-MS/s Pipelined-SAR ADC Reusing PVT-Stabilized Dynamic Comparator in 65-nm CMOS Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,Volume: 67,Issue: 7,Page: 1174-1178
Authors:  Zhang, Jin;  Ren, Xiaoqian;  Liu, Shubin;  Chan, Chi Hang;  Zhu, Zhangming
Favorite |  | TC[WOS]:2 TC[Scopus]:5 | Submit date：2021/12/06
Analog-to-digital Converter (Adc)  Full Dynamic Adc  Pipelined Successive-approximation-register (Sar)  Pvt-stabilized Dynamic Amplification  Reused Comparator  
16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur Conference paper
FREQUENCY SYNTHESIZERS
Authors:  Yang, Z.;  Chen, Y.;  Yang, S.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/01/25
iSSPLL  
3.5 A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 17-21 Feb. 2019
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:12 | Submit date：2021/03/09
16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors:  Zunsong Yang;  Yong Chen;  Shiheng Yang;  Pui-In Mak;  Rui P. Martins
Favorite |  | TC[WOS]:0 TC[Scopus]:43 | Submit date：2019/03/13
A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8- μ W Steady-State Power Journal article
IEEE Journal of Solid-State Circuits, 2018,Page: 2624-2635
Authors:  Lei, K. M.;  Mak, P. I.;  Law, M. K.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/01/25
Crystals  Oscillators  Chirp  Batteries  Steady-state  Capacitance  Very large scale integration