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Mixed Deep Reinforcement Learning Considering Discrete-continuous Hybrid Action Space for Smart Home Energy Management Journal article
Journal of Modern Power Systems and Clean Energy, 2022,Volume: 10,Issue: 3,Page: 743-754
Authors:  Huang, Chao;  Zhang, Hongcai;  Wang, Long;  Luo, Xiong;  Song, Yonghua
Adobe PDF | Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/06/19
Demand Response  
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 5,Page: 1358-1371
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Wang, Lin;  Mak, Pui In;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/05/13
And Zero Net Current (Znc)  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Cmos  Four-level Pulse-amplitude Modulation (Pam)  Frequency Detector (Fd)  Half-rate  Negative Net Current (Nnc)  Positive Net Current (Pnc)  Reference-less  
A 0.1-V VIN Subthreshold 3-Stage Dual-Branch Charge Pump with 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
Authors:  Yong, Jack Kee;  Ramiah, Harikrishnan;  Churchill, Kishore Kumar Pakkirisami;  Chong, Gabriel;  Mekhilef, Saad;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/08/05
CMOS  Control systems  Cross-coupled charge pump (CCCP)  energy harvesting (EH)  Logic gates  power conversion efficiency (PCE)  Switches  Switching circuits  Transistors  Voltage  Voltage control  
A sub-0.25pJ/bit 47.6- to-58.8Gb/s reference-less single-loop PAM-4 bang-bang CDR with a deliberately-current- mismatch frequency acquisition technique in 28nm CMOS Conference paper
Circuit Techniques for High-Speed Transceiver Front-Ends
Authors:  Zhao, X.;  Chen, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
CDR  CMOS  Reference  
A Sub-0.25pJ/bit 47.6-to-58.8Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberately-Current-Mismatch Frequency Acquisition Technique in 28nm CMOS Conference paper
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, USA, 7-9 June 2021
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Wang, Lin;  Mak, Pui In;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:2 | Submit date:2021/09/20
4-level Pulse Amplitude Modulation (Pam-4)  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Cmos  Frequency Detector (Fd)  Half-rate  Negative (Nnc) Net Current  Positive (Pnc)  Reference Less  Single Loop  Zero (Znc)  
A 0.5-V supply, 36nW bandgap reference with 42ppm/°C average temperature coefficient within -40°C to 120°C Journal article
IEEE Transactions on Circuits and Systems I - Regular Papers, 2020,Page: 3656-3669
Authors:  U, C.-W.;  Zeng, W.-L.;  Law, M. K.;  Lam, C. S.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
Bandgap voltage reference  low voltage  low power  switched capacitor circuits  temperature coefficient.  
A 0.5-V Supply, 36 nW Bandgap Reference with 42 ppm/°C Average Temperature Coefficient Within-40 °c to 120 °c Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3656-3669
Authors:  Uu,Chi Wa;  Zeng,Wen Liang;  Law,Man Kay;  Lam,Chi Seng;  Martins,Rui Paulo
Favorite |  | TC[WOS]:8 TC[Scopus]:10 | Submit date:2021/03/04
Bandgap Voltage Reference  Low Power  Low Voltage  Switched Capacitor Circuits  Temperature Coefficient  
A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery Journal article
IEEE Transactions on Circuits and Systems II - Express Briefs, 2020,Page: 1669-1673
Authors:  Zeng, W. L.;  Bonizzoni, E.;  U, C.-W.;  Lam, C. S.;  Sin, S. W.;  Chio, U-F.;  Maloberti, F.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
ADC  current pump  additional loop compensation  buck converter  DCM  bond-wire inductor  fast transient recovery.  
A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,Volume: 67,Issue: 9,Page: 1669-1673
Authors:  Zeng,Wen Liang;  Bonizzoni,Edoardo;  Wu,Chi Wa;  Lam,Chi Seng;  Sin,Sai Weng;  Chio,U. Fat;  Maloberti,Franco;  Martins,Rui Paulo
Favorite |  | TC[WOS]:3 TC[Scopus]:3 | Submit date:2021/03/04
Adc  Current Pump  Additional Loop Compensation  Buck Converter  Dcm  Bond-wire Inductor  Fast Transient Recovery  
A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector Journal article
IEEE Access, 2019,Volume: 8,Page: 2222-2232
Authors:  Yang,Zunsong;  Chen,Yong;  Yang,Shiheng;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:11 TC[Scopus]:10 | Submit date:2021/03/09
Cmos  Divider-by-4  Dual Loop  Dynamic Latch  Figure-of-merit (Fom)  Frequency Detector (Fd)  Millimeter (Mm)-wave  Phase Detector (Pd)  Phase-locked Loop (Pll)  Voltage-controlled Oscillator (Vco)  Voltage-to-current Converter (Vic)