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A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector Journal article
IEEE Access, 2019,Volume: 8,Page: 2222-2232
Authors:  Yang,Zunsong;  Chen,Yong;  Yang,Shiheng;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:11 TC[Scopus]:10 | Submit date:2021/03/09
Cmos  Divider-by-4  Dual Loop  Dynamic Latch  Figure-of-merit (Fom)  Frequency Detector (Fd)  Millimeter (Mm)-wave  Phase Detector (Pd)  Phase-locked Loop (Pll)  Voltage-controlled Oscillator (Vco)  Voltage-to-current Converter (Vic)  
A 6.5x7 µm2 0.98-to-1.5 mW Non-Self-Oscillation-Mode Frequency Divider-by-2 Achieving a Single-Band Untuned Locking Range of 166.6% (4 to 44 GHz) Journal article
IEEE SOLID-STATE CIRCUITS LETTERS, 2019,Page: 37-40
Authors:  Chen, Y.;  Yang, Z.;  Zhao, X.;  Huang, Y.;  Mak, P. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
Frequency divider  locking range (LR)  5G radio band  self-oscillationmode (SOM)  phase noise  non-self-oscillation-mode (NSOM)  
A 6.5 ×7μ m2 0.98-to-1.5 mW Nonself-Oscillation-Mode Frequency Divider-by-2 Achieving a Single-Band Untuned Locking Range of 166.6% (4-44 GHz) Journal article
IEEE Solid-State Circuits Letters, 2019,Volume: 2,Issue: 5,Page: 37-40
Authors:  Chen,Yong;  Yang,Zunsong;  Zhao,Xiaoteng;  Huang,Yunbo;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:13 TC[Scopus]:16 | Submit date:2021/03/09
5g Bands  Current-mode-logic (Cml)  Figure-of-merit (Fom)  Frequency Divider  Locking Range (Lr)  Non-self-oscillation-mode (Nsom)  Phasor  Self-oscillation-mode (Som)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Conference paper
Authors:  Wang, Wei;  Zhu, Yan;  Chan, Chi-Hang;  Martins, Rui Paulo
Favorite |  | TC[WOS]:9 TC[Scopus]:9 | Submit date:2018/10/30
Terms-Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang,Wei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite |  | TC[WOS]:9 TC[Scopus]:9 | Submit date:2019/08/22
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang W.;  Zhu Y.;  Chan C.-H.;  Martins R.P.
Favorite |  | TC[WOS]:9 TC[Scopus]:9 | Submit date:2019/02/11
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Page: 1-12
Authors:  Wang, W.;  Zhu, Y.;  Chan, C. H.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/01/25
ADC  
A digital LDO with Co-SA logics and TSPC dynamic latches for fast transient response Journal article
IEEE Solid-State Circuits Letters, 2018,Volume: 1,Issue: 6,Page: 154-157
Authors:  Zhao,Lei;  Lu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:10 TC[Scopus]:11 | Submit date:2021/03/09
Continuous-time comparator  digital low-dropout regulator (DLDO)  dynamic logic  transient response  true single-phase clock (TSPC) latch  
N-bits successive approximation register analog-to-digital converting circuit Patent
专利类型: 发明专利, 专利号: US20120306679A1, 申请日期: 2011-06-01,
Authors:  Yan ZHU;  Chi-Hang CHAN;  U-Fat CHIO;  Sai-Weng SIN;  Seng-Pan U;  Rui Paulo Da Silva MARTINS;  Franco MALOBERTI
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/26
N-Bits Successive Approximation Register Analog-to-Digital Converting System Patent
专利类型: 发明专利, 专利号: US8344931B2, 申请日期: 2011-06-01, 公开日期: 2013
Authors:  Yan Zhu;  Chi Hang Chan;  U Fat Chio;  Sai Weng Sin;  Seng Pan U;  Rui Paulo Da Silva Martins;  Franco Maloberti
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/30