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A Low-Jitter and Low-Reference-Spur 320 GHz Signal Source With an 80 GHz Integer-N Phase-Locked Loop Using a Quadrature XOR Technique Journal article
IEEE Transactions on Microwave Theory and Techniques, 2022,Volume: 70,Issue: 5,Page: 2642-2657
Authors:  Liang, Yuan;  Boon, Chirn Chye;  Qi, Gengzhen;  Dziallas, Giannino;  Kissinger, Dietmar;  Ng, Herman Jalli;  Mak, Pui In;  Wang, Yong
Favorite |  | TC[WOS]:1 TC[Scopus]:0 | Submit date:2022/05/17
Bicmos  Exclusive-or (Xor) Gate  Frequency Detector  Harmonic Cancellation  Jitter  Lock Detector  Mixers  Oscillators  Phase Detector (Pd)  Phase Frequency Detectors  Phase Locked Loops  Phase Noise  Phase Noise  Phase-locked Loop (Pll)  Terahertz (Thz).  Topology  Voltage-controlled Oscillators  
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 2,Page: 546-561
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/10/28
Acquisition Speed  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Clocks  Cmos  Detectors  Four-level Pulse Amplitude Modulation (Pam-4)  Frequency Detector (Fd)  Frequency Modulation  Hybrid Control Circuit (Hcc)  Jitter  Jitter Tolerance (Jtol)  Jitter Transfer Function (Jtf)  Logic Gates  Phase Detector (Pd)  Strobe Point (Sp).  Switches  Voltage-controlled Oscillators  
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022,Volume: 30,Issue: 2,Page: 238-242
Authors:  Yang, Zunsong;  Chen, Yong;  Yuan, Jia;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:3 | Submit date:2022/03/04
Binary Frequency Shift Keying (Bfsk)  Frequency-locked Loop (Fll)  Integer-n  Phase Detector (Pd)  Phase Noise (Pn)  Phase-locked Loop (Pll)  Push-pull  Reference (Ref) Spur  Sub-sampling (Ss)  Voltage-controlled Oscillator (Vco)  
A Half-Tangent Phase-Locked Loop for Variable-Frequency Grids of More Electric Aircraft Journal article
IEEE Transactions on Industrial Electronics, 2022
Authors:  Li, Guangqi;  Dai, Zhiyong;  Wu, Bingxuan;  Yang, Yongheng;  Huang, Jin;  Lam, Chi Seng
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/05/17
Aerospace electronics  Frequency estimation  Half-tangent phase-locked loop  large signal model  Phase locked loops  phase portrait  Power electronics  Steady-state  varying frequency grid  Voltage  Voltage-controlled oscillators  
Expansion of Rare Cancer Cells into Tumoroids for Therapeutic Regimen and Cancer Therapy Journal article
Advanced Therapeutics, 2021,Volume: 4,Issue: 7
Authors:  Enkhbat, Myagmartsend;  Liu, Yung Chiang;  Kim, Jua;  Xu, Yanshan;  Yin, Zongyi;  Liu, Tzu Ming;  Deng, Chu Xia;  Zou, Chang;  Xie, Xi;  Li, Xiaowu;  Wang, Peng Yuan
Adobe PDF | Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/12/08
Assembloid  Cancer Stem Cell  Circulating Tumor Cell  Drug Screening  Microenvironment  
A 0.003-mm2440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021,Volume: 68,Issue: 6,Page: 2307-2316
Authors:  Yang, Zunsong;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite |  | TC[WOS]:6 TC[Scopus]:5 | Submit date:2021/09/20
CMOS  current-reuse sampling phase detector (CRS-PD)  integrated jitter  loop filter (LF)  master-slave sampling filter (MSSF)  master-slave sampling phase detector (MSS-PD)  phase noise (PN)  Phase-locked loop (PLL)  reference spur  ring voltage-controlled oscillator (VCO)  type-I  type-II  
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:8 TC[Scopus]:0 | Submit date:2021/03/09
Bang- Bang Clock And Data Recovery (Bbcdr)  Bang-bang Phase Detector (Bbpd)  Cmos  Four- And Eight-level Pulse Amplitude Modulation (Pam-4/-8)  Half Rate  Hogge And alexAnder Pd  Jitter Tolerance (Jtol).  Jitter Transfer Function (Jtf)  Non-return-to-zero (Nrz)  Strongarm Comparator  
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/μs Acquisition Speed of PAM-4 data in 28nm CMOS Conference paper
Proceedings of the Custom Integrated Circuits Conference, Boston, MA, USA, 22-25 March 2020
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:7 | Submit date:2021/03/04
Acquisition Speed  Alexander Phase Detector (Pd)  Bang-bang  Bang-bang Clock And Data Recovery (Cdr)  Charge Pump (Cp)  Frequency Detector (Fd)  Full-rate  Jitter Tolerance (Jtf)  Jitter Transfer Function (Jtf)  Single Loop  Strobe Point (Sp)  
A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector Journal article
IEEE Access, 2019,Volume: 8,Page: 2222-2232
Authors:  Yang,Zunsong;  Chen,Yong;  Yang,Shiheng;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:11 TC[Scopus]:10 | Submit date:2021/03/09
Cmos  Divider-by-4  Dual Loop  Dynamic Latch  Figure-of-merit (Fom)  Frequency Detector (Fd)  Millimeter (Mm)-wave  Phase Detector (Pd)  Phase-locked Loop (Pll)  Voltage-controlled Oscillator (Vco)  Voltage-to-current Converter (Vic)  
A Review of Compressive Sensing in Information Security Field Journal article
IEEE Access, 2016,Volume: 4,Page: 2507 - 2519
Authors:  YUSHU ZHANG;  LEO YU ZHANG;  JIANTAO ZHOU;  LICHENG LIU;  FEI CHEN;  XING HE
Adobe PDF | Favorite |  | TC[WOS]:128 TC[Scopus]:141 | Submit date:2019/04/16
Compressive Sensing  Theoretical Security  Application Security  Image Cipher  Chaos  Optics