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A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA
Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, FEB 16-20, 2020
Authors:
Fan,Chao
;
Yin,Jun
;
Lim,Chee Cheow
;
Mak,Pui In
;
Martins,Rui P.
Favorite
|
|
TC[WOS]:
12
TC[Scopus]:
14
|
Submit date:2021/03/04
An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances
Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 12,Page: 3528-3539
Authors:
Lim, Chee Cheow
;
Ramiah, Harikrishnan
;
Yin, Jun
;
Mak, Pui-In
;
Martins, Rui P.
Favorite
|
|
TC[WOS]:
22
TC[Scopus]:
23
|
Submit date:2019/01/17
Figure of merit (FoM)
flicker noise upcon-version
inverse-class-F (class-F-1) oscillator
phase noise (PN)
second harmonic resonance
voltage-biased oscillator
An Inverse-Class-F CMOS Oscillator with Intrinsic-High-Q 1st-Harmonic and 2nd-Harmonic Resonances
Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 12,Page: 3528 - 3539
Authors:
Chee Cheow Lim
;
Harikrishnan Ramiah
;
Jun Yin
;
Pui-In Mak
;
Rui P. Martins
Favorite
|
|
TC[WOS]:
22
TC[Scopus]:
23
|
Submit date:2019/03/12
Figure Of Merit (Fom)
Flicker Noise Upconversion
Inverse-class-f (Class-f−1) Oscillator
Phase Noise (Pn)
Second Harmonic Resonance
Voltage-biased Oscillator
An inverse-class-F CMOS VCO with intrinsic-high-Q 1st- and 2nd-harmonic resonances for 1/f2-to-1/f3phase-noise suppression achieving 196.2dBc/Hz FOM
Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, United states, 2 11, 2018 - 2 15, 2018
Authors:
Lim, Chee-Cheow
;
Yin, Jun
;
Mak, Pui-In
;
Ramiah, Harikrishnan
;
Martins, Rui P.
Favorite
|
|
TC[WOS]:
0
TC[Scopus]:
22
|
Submit date:2018/11/06
An inverse-class-F CMOS VCO with intrinsic-high-Q 1st- and 2nd-harmonic resonances for 1/f2-to-1/f3 phase-noise suppression achieving 196.2dBc/Hz FOM
Conference paper
2018 IEEE International Solid - State Circuits Conference - (ISSCC), San Francisco, CA, FEB 11-15, 2018
Authors:
Chee-Cheow Lim
;
Jun Yin
;
Pui-In Mak
;
Harikrishnan Ramiah
;
Rui P. Martins
Favorite
|
|
TC[WOS]:
20
TC[Scopus]:
22
|
Submit date:2019/02/11
An Inverse-Class-F CMOS VCO with Intrinsic-High-Q 1st-and 2nd-Harmonic Resonances for 1/f(2)-to-1/f(3) Phase-Noise Suppression Achieving 196.2dBc/Hz FOM
Conference paper
Authors:
Lim, Chee-Cheow
;
Yin, Jun
;
Mak, Pui-In
;
Ramiah, Harikrishnan
;
Martins, Rui P.
;
IEEE
Favorite
|
|
TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2018/10/30
LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study
Journal article
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2017,Volume: 91,Issue: 3,Page: 497-502
Authors:
Chee Cheow Lim
;
Harikrishnan Ramiah
;
Jun Yin
;
Pui-In Mak
;
Rui P. Martins
Favorite
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|
TC[WOS]:
0
TC[Scopus]:
1
|
Submit date:2018/10/30
Inductor
Patterned Floating Shield
Substrate
Cmos
Vco
A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM
Conference paper
2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, QC, Canada, 22-25 May 2016
Authors:
Chee-Cheow Lim
;
Harikrishnan Ramiah
;
Jun Yin
;
Pui-In Mak
;
Rui P. Martins
Favorite
|
|
TC[WOS]:
2
TC[Scopus]:
4
|
Submit date:2019/02/11
Inductor
Rfic
Vco
Dual-layer Patterned Floating Shield