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A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS
Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 5,Page: 1358-1371
Authors:
Zhao, Xiaoteng
;
Chen, Yong
;
Wang, Lin
;
Mak, Pui In
;
Maloberti, Franco
;
Martins, Rui P.
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TC[WOS]:
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TC[Scopus]:
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Submit date:2022/05/13
and zero net current (ZNC)
Bang-bang clock and data recovery (BBCDR)
charge pump (CP)
CMOS
four-level pulse-amplitude modulation (PAM)
frequency detector (FD)
half-rate
negative net current (NNC)
positive net current (PNC)
reference-less
A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS
Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 3,Page: 1159-1170
Authors:
He, Jian
;
Zhang, Yuguang
;
Liu, Han
;
Liao, Qiwen
;
Zhang, Zhao
;
Li, Miaofeng
;
Jiang, Fan
;
Shi, Jingbo
;
Liu, Jian
;
Wu, Nanjian
;
Chen, Yong
;
Chiang, Patrick Yin
;
Yu, Ningmei
;
Xiao, Xi
;
Qi, Nan
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TC[WOS]:
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TC[Scopus]:
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Submit date:2022/03/28
Artificial Transmission Line (t-Line)
Cmos
Distributed Driver
Extinction Ratio (Er)
Feed-forward Equalizer (Ffe)
High-swing
Mach-zehnder Modulator (Mzm)
Nrz
Optical Interconnects
Pam-4
Push-pull
Silicon-photonics
A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR
Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 3,Page: 767-780
Authors:
Liao, Qiwen
;
Zhang, Yuguang
;
Ma, Siyuan
;
Wang, Lei
;
Li, Leliang
;
Li, Guike
;
Zhang, Zhao
;
Liu, Jian
;
Wu, Nanjian
;
Liu, Liyuan
;
Chen, Yong
;
Xiao, Xi
;
Qi, Nan
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TC[WOS]:
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TC[Scopus]:
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Submit date:2022/03/28
Clock And Data Recovery (Cdr)
Cmos
Distributed Driver
Four-level Pulse Amplitude (Pam-4)
Machâ Zehnder Modulator (Mzm)
Optical Digital-to-analog Converter (Dac)
Silicon Photonic (Siph)
Transmitter (Tx)
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS
Journal article
IEEE Journal of Solid-State Circuits, 2022,Volume: 57,Issue: 2,Page: 546-561
Authors:
Zhao, Xiaoteng
;
Chen, Yong
;
Mak, Pui In
;
Martins, Rui P.
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TC[WOS]:
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Submit date:2021/10/28
Acquisition Speed
Bang-bang Clock And Data Recovery (Bbcdr)
Charge Pump (Cp)
Clocks
Cmos
Detectors
Four-level Pulse Amplitude Modulation (Pam-4)
Frequency Detector (Fd)
Frequency Modulation
Hybrid Control Circuit (Hcc)
Jitter
Jitter Tolerance (Jtol)
Jitter Transfer Function (Jtf)
Logic Gates
Phase Detector (Pd)
Strobe Point (Sp).
Switches
Voltage-controlled Oscillators
A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank
Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022,Volume: 69,Issue: 1,Page: 172-185
Authors:
Guo, Hao
;
Chen, Yong
;
Yang, Chaowei
;
Mak, Pui In
;
Martins, Rui P.
Favorite
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TC[WOS]:
2
TC[Scopus]:
1
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Submit date:2021/09/20
1/f³
Phase Noise Corner
Cmos
Common-mode (Cm)
Differential-mode (Dm)
Figure-of-merit (Fom)
Flicker (1/f) Noise
Harmonic Analysis
Impulse Sensitivity Function (Isf)
Inductance
Inductor-capacitor (Lc) Tank
Inductors
Mos Devices
Resistance
Resistor-inductor-capacitor-mutual Inductance (Rlcm).
Resistors
Thermal Noise
Voltage-controlled Oscillator (Vco)
Voltage-controlled Oscillators
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-distorter (DAAPD) Reconfigurable Linearization Technique
Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021,Volume: 68,Issue: 11,Page: 3381-3385
Authors:
Mariappan, Selvakumar
;
Rajendran, Jagadheswaran
;
Chen, Yong
;
Mak, Pui In
;
Martins, Rui P.
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TC[WOS]:
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TC[Scopus]:
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Submit date:2021/09/20
Adjacent Channel Leakage Ratio (Aclr) And Error Vector Magnitude (Evm)
Back-off Output Power (Pbo)
Cmos
Digitally-assisted Analog Predistorter (Daapd)
Long Term Evolution
Long-term Evolution (Lte).
Power Amplifier (Pa)
Power Amplifiers
Power Generation
Power-added Efficiency (Pae)
Transconductance
Transistors
Tuning
Voltage Control
A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio
Conference paper
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings, Grenoble, France, 13-22 Sept. 2021
Authors:
Wei, Dong
;
Wu, Tianxiang
;
Ma, Shunli
;
Chen, Yong
;
Ren, Junyan
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TC[WOS]:
1
TC[Scopus]:
2
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Submit date:2021/12/08
5g New Radio
Cmos
Common Gate
Common Source
Fractional Bandwidth (Bw)
Gain Flatness
Gm Boosting
Ieee 802.11aj
Low-noise Amplifier (Lna)
Magnetically Coupling Resonator
Noise Factor
Noise Figure (Nf)
Transformer
A 0.35-V 5,200-μm² 2.1-MHz Temperature- Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator
Journal article
IEEE Journal of Solid-State Circuits, 2021
Authors:
Lei, Ka Meng
;
Mak, Pui In
;
Martins, Rui P.
Favorite
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TC[WOS]:
1
TC[Scopus]:
2
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Submit date:2021/09/20
Asymmetric Rc Network
Circuit Stability
Cmos
Energy-harvesting
Internet-of-things (Iot)
Logic Gates
Mos Devices
Oscillators
Relaxation Oscillator (Rxo)
Resilience
Stability Criteria
Swing-boosting
Temperature Resilience
Thermal Stability
Ultra-low-power
Ultra-low-voltage (Ulv).
A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques
Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021,Volume: 68,Issue: 9,Page: 3093-3097
Authors:
Huang, Yunbo
;
Chen, Yong
;
Jiao, Hailong
;
Mak, Pui In
;
Martins, Rui P.
Favorite
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TC[WOS]:
3
TC[Scopus]:
3
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Submit date:2021/09/20
Cmos
Narrow Pulse Shielding
Reference (Ref) Feedthrough Suppression
Sampling Phase-locked Loop (S-pll)
T-shape Switch
Type-i
Voltage-controlled Oscillator (Vco)
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS
Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021,Volume: 68,Issue: 9,Page: 3108-3112
Authors:
Yang, Shiheng
;
Yin, Jun
;
Xu, Tailong
;
Yi, Taimo
;
Mak, Pui In
;
Li, Qiang
;
Martins, Rui P.
Favorite
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TC[WOS]:
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TC[Scopus]:
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Submit date:2021/09/20
Analog Phase-locked Loop (Pll)
Area
Charge-sharing Integrator
Cmos
Digital Pll
Hybrid Pll
Integer-n
Integrator
Jitter
Ring Oscillator
Ultra-low Power