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A 12-Bit 50 MS/s Split-CDAC-Based SAR ADC Integrating Input Programmable Gain Amplifier and Reference Voltage Buffer Journal article
Electronics (Switzerland), 2022,Volume: 11,Issue: 12
Authors:  Xu, Zhuofan;  Hu, Biao;  Wu, Tianxiang;  Yao, Yuting;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/08/02
Asynchronous Sar Adc  Input Pga  Rv-buffer  Split Cdac  
A 10-MHz to 50-GHz low-jitter multiphase clock generator for high-speed oscilloscope in 0.15-μm GaAs technology Journal article
International Journal of Circuit Theory and Applications, 2022,Volume: 50,Issue: 2,Page: 367-381
Authors:  Wu, Tianxiang;  Wang, Xi;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2022/03/04
A 23- to 28-GHz 5-bit switch-type phase shifter with 1-bit calibration based on optimized ABCD matrix design methods for 5G MIMO system in 0.15-μm GaAs Journal article
International Journal of Circuit Theory and Applications, 2022,Volume: 50,Issue: 6,Page: 1834-1854
Authors:  Zhang, Zhiyang;  Nie, Lihe;  Zhang, Jincheng;  Wu, Tianxiang;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2022/05/17
Fifth-generation  Impedance Matching  Phase Shifter  Phased-array System  Switch-type  
A 6.5-mm2 10.5-to-15.5-GHz Differential GaN PA with Coupled-Line-Based Matching Networks Achieving 10-W Peak Psat and 42% PAE Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2022
Authors:  Zhang, Jincheng;  Nie, Lihe;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/08/05
broadband matching  coupled-line  Couplings  differential  Gallium nitride  GaN  Impedance  Ku-band  power amplifier (PA)  Power amplifiers  power combiner  Q-factor  Resonators  Transistors  
A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio Conference paper
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings, Grenoble, France, 13-22 Sept. 2021
Authors:  Wei, Dong;  Wu, Tianxiang;  Ma, Shunli;  Chen, Yong;  Ren, Junyan
Favorite |  | TC[WOS]:0 TC[Scopus]:2 | Submit date:2021/12/08
5g New Radio  Cmos  Common Gate  Common Source  Fractional Bandwidth (Bw)  Gain Flatness  Gm Boosting  Ieee 802.11aj  Low-noise Amplifier (Lna)  Magnetically Coupling Resonator  Noise Factor  Noise Figure (Nf)  Transformer  
A sub-6g sp32t single-chip switch with nanosecond switching speed for 5g applications in 0.25 µm gaas technology Journal article
Electronics (Switzerland), 2021,Volume: 10,Issue: 12
Authors:  Wu, Tianxiang;  Wei, Jipeng;  Liu, Hongquan;  Ma, Shunli;  Chen, Yong;  Ren, Junyan
Favorite |  | TC[WOS]:4 TC[Scopus]:4 | Submit date:2021/10/28
Gaas Process  Pseudomorphic High-electron-mobility Transistor (Phemt)  Single-pole 32-throw (Sp32t) Switch  Sub-6g  
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS Journal article
IEEE Access, 2021,Volume: 9,Page: 77545-77554
Authors:  Li, Manxin;  Yao, Yuting;  Hu, Biao;  Wei, Jipeng;  Chen, Yong;  Ma, Shunli;  Ye, Fan;  Ren, Junyan
Favorite |  | TC[WOS]:5 TC[Scopus]:5 | Submit date:2021/10/28
Asynchronous Logic  Cmos  Customized Unit Capacitor  Figure-of-merit (Fom)  Split-cdac  Successive Approximation Register (Sar) Analog-to-digital Converter (Adc)  
A 120-150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psatfor Sub-THz Imaging System Journal article
IEEE Access, 2021,Volume: 9,Page: 74752-74762
Authors:  Zhang, Jincheng;  Wu, Tianxiang;  Nie, Lihe;  Ma, Shunli;  Chen, Yong;  Ren, Junyan
Favorite |  | TC[WOS]:4 TC[Scopus]:3 | Submit date:2021/10/28
Cmos  D-band  Frequency Modulated Continuous Wave (Fmcw)  Imaging System  Power Amplifier (Pa)  Power Combining  Sub-terahertz (Sub-thz)  
A 3-to-78GHz Differential Distributed Amplifier with Ultra- Balanced Active Balun and Gain Boosting Techniques in 65-nm CMOS Process Conference paper
Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference
Authors:  Zhang, Jincheng;  Wu, Tianxiang;  Chen, Yong;  Ren, Junyan;  Ma, Shunli
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2022/05/13
Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial V-cm-Based Switching Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 3,Page: 1168-1172
Authors:  Xing, Dezhi;  Zhu, Yan;  Chan, Chi-Hang;  Sin, Sai-Weng;  Ye, Fan;  Ren, Junyan;  U, Seng-Pan;  Martins, Rui Paulo
Favorite |  | TC[WOS]:11 TC[Scopus]:13 | Submit date:2018/10/30
Common Mode Variation  Partial V-cm-based Switching  Time-interleaved Successive ApproximaTion Register Analog-to-digital Converter (Ti Sar Adc)