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| SARS-CoV-2 RNA detection with duplex-specific nuclease signal amplification Journal article
Micromachines, 2021,Volume: 12,Issue: 2
Authors: Liu,Meiqing; Li,Haoran; Jia,Yanwei ; Mak,Pui In; Martins,Rui P.
  Favorite | | TC[WOS]:0 TC[Scopus]:0 | Submit date：2021/03/04
Dna Probe Duplex-specific Nuclease Rna Detection Sars-cov-2 Signal Amplification |
| A Single-Stage Inductive-Power-Transfer Converter for Constant-Power and Maximum-Efficiency Battery Charging Journal article
IEEE Transactions on Power Electronics, 2020,Volume: 35,Issue: 9,Page: 8973-8984
Authors: Huang，Zhicong; Lam，Chi Seng; Mak，Pui In; Martins，Rui Paulo Da Silva; Wong，Siu Chung; Tse，Chi K.
Favorite | | TC[WOS]:1 TC[Scopus]:2 | Submit date：2021/03/04
Battery charging Constant power Inductive power transfer (IPT) Maximum efficiency Soft switching |
| Accuracy-enhanced variance-based time-skew calibration using SAR as window detector Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019,Volume: 27,Issue: 2,Page: 481-485
Authors: Liu J.; Chan C.-H.; Sin S.-W.; Seng-Pan U.; Martins R.P.
Favorite | | TC[WOS]:2 TC[Scopus]:2 | Submit date：2019/02/13
Bandwidth mismatches split-digital to analog converter (DAC) successive-approximation-register (SAR) analog-to-digital converter (ADC) time-interleaved (TI) variance based window detector (WD) |
| Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors: Xing D.; Zhu Y.; Chan C.-H.; Maloberti F.; Seng-Pan U.; Martins R.P.
Favorite | | TC[WOS]:0 TC[Scopus]:0 | Submit date：2019/02/11
reference interference SAR ADC time-interleaved scheme two-step SAR conversion |
| 27.3 A Piezoelectric Energy-Harvesting Interface Using Split Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy Extraction Improvement Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors: Zhiyuan Chen; Yang Jiang; Man-Kay Law; Pui-In Mak; Xiaoyang Zeng; Rui P. Martins
Favorite | | TC[WOS]:0 TC[Scopus]:8 | Submit date：2019/03/13 |
| 16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors: Zunsong Yang; Yong Chen; Shiheng Yang; Pui-In Mak; Rui P. Martins
Favorite | | TC[WOS]:0 TC[Scopus]:17 | Submit date：2019/03/13 |
| 26.2 A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors: Hao Guo; Yong Chen; Pui-In Mak; Rui P. Martins
Favorite | | TC[WOS]:0 TC[Scopus]:16 | Submit date：2019/03/13 |
| A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2019,Page: 1 - 12
Authors: Shiheng Yang; Jun Yin; Haidong Yi; Wei-Han Yu; Pui-In Mak; Rui P. Martins
Favorite | | TC[WOS]:0 TC[Scopus]:10 | Submit date：2019/03/12
Bluetooth Low Energy (Ble) Cmos Energy Harvesting Master-slave Sampling Filter (Mssf) Micropower Manager (Μpm) Phase-locked Loop (Pll) Power Amplifier (Pa) Power Gating Transmitter (Tx) Ultralow-voltage (Ulv) Voltage-controlled Oscillator (Vco) |
| A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler Conference paper
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
Authors: Jiang W.; Zhu Y.; Chan C.-H.; Murmann B.; Seng-Pan U.; Martins R.P.
Favorite | | TC[WOS]:0 TC[Scopus]:3 | Submit date：2019/02/11
background calibration current integrating sampler Time-interleaved ADC timing skew |
| An Inverse-Class-F CMOS Oscillator with Intrinsic-High-Q 1st-Harmonic and 2nd-Harmonic Resonances Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 12,Page: 3528 - 3539
Authors: Chee Cheow Lim; Harikrishnan Ramiah; Jun Yin; Pui-In Mak; Rui P. Martins
Favorite | | TC[WOS]:6 TC[Scopus]:10 | Submit date：2019/03/12
Figure Of Merit (Fom) Flicker Noise Upconversion Inverse-class-f (Class-f−1) Oscillator Phase Noise (Pn) Second Harmonic Resonance Voltage-biased Oscillator |
