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A 21.8–41.6GHz Fast-Locking Sub-Sampling PLL with Dead Zone Automatic Controller Achieving 62.7-fs Jitter and –250.3dB FoM Conference paper
Denver, CO, 2022-06
Authors:  Chen, Wen;  Shu, Yiyang;  Qan, Huizhen Jenny;  Yin, Jun;  Mak, Pui-In;  Gao, Xiang;  Luo, Xun
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/08/19
A 21.8-41.6GHz Fast-Locking Sub-Sampling PLL with Dead Zone Automatic Controller Achieving 62.7-fs Jitter and-250.3dB FoM Conference paper
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Authors:  Chen, Wen;  Shu, Yiyang;  Qian, Huizhen Jenny;  Yin, Jun;  Mak, Pui In;  Gao, Xiang;  Luo, Xun
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2023/01/30
jitter  locking  millimeter-wave (mmW)  sub-sampling phase-locked loop (SSPLL)  wideband