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A 0.45 V 147–375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures Journal article
IEEE Transactions on Very Large Scale Integration Systems, 2017,Page: 1307-1319
Authors:  Ieong, C. I.;  Li, M.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.;  Martins, R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2022/01/24
Adaptive temporal decimation (ATD)  data compression processor  Electrocardiogram (ECG)  near-threshold digital logics  wavelet transform (WT)  wavelet shrinkage (WS)  
Precise Droplet Splitting on Digital Microfluidic Chip with Blade Structures Conference paper
MicroTAS 2016
Authors:  Dong, C.;  Jia, Y.;  Chen, T.;  Gao, J.;  Wan, L.;  Mak, P. I.;  Vai, M. I.;  Martins, R. P.
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digital microfluidics  microstructure  
Sub-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform and Maxima Modulus Pair Recognition for Power-Efficient Wireless Arrhythmia Monitoring Conference paper
Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC)
Authors:  Ieong, C.-I.;  Mak, P. I.;  Vai, M. I.;  Martins, R. P.
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Wireless Arrhythmia Monitoring  
Sub-threshold VLSI-Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques Conference paper
21st Asia and South Pacific Design Automation Conference (ASP-DAC)
Authors:  Li, M.;  Ieong, C. I.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.;  Pun, S. H.;  Martins, R. P.
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Sub-threshold Logic  Unbalanced Pull-up/down Network  Logical Effort  Inverse-Narrow-Width Effect  
Energy Optimized Sub-threshold VLSI Logic Family with Unbalanced Pull-up/down Network and Inverse-Narrow-Width Techniques Journal article
IEEE Transactions on Very large scale integration systems, 2015,Page: 3119-3123
Authors:  Li, M.;  Ieong, C. I.;  Law, M. K.;  Mak, P. I.;  Vai, M. I.;  Pun, S. H.;  Martins, R. P.
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CMOS  Electrocardiography (ECG)  device sizing  finite impulse response (FIR) filter  inverse-narrow-width (INW)  logical effort  process-voltage-temperature (PVT) variations  sub-threshold standard logic library  ultra-low-energy  ultra-low-voltage  
Channel modeling and simulation for galvanic coupling intra-body communication Conference paper
IFMBE Proceedings
Authors:  Gao Y.M.;  Li X.X.;  Lucev Vasic Z.;  Pun S.H.;  Mak P.U.;  Krois I.;  Cifrek M.;  Vai M.I.
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Constellation diagrams  Equalizer  Human channel mode  Intra-body communication (IBC)  Modulation methods  
Effect of transmitter and receiver electrodes configurations on the capacitive intrabody communication channel from 100 kHz to 100 MHz Conference paper
IFMBE Proceedings, Singapore, Singapore, 124, 2013 - 127, 2013
Authors:  Vasi, . Luev;  Gao, Y.M.;  Pun, S.H.;  Mak, P.U.;  Vai, M.I.;  Krois, I.;  Cifrek, M.
Favorite |  | TC[WOS]:0 TC[Scopus]:7 | Submit date：2018/11/06
Effect of transmitter and receiver electrodes configurations on the capacitive intrabody communication channel from 100 KHz to 100 MHz Conference paper
IFMBE Proceedings, Singapore, Singapore, 124, 2013 - 127, 2013
Authors:  Vasi Luev, .;  Gao, Y.M.;  Pun, S.H.;  Mak, P.U.;  Vai, M.I.;  Krois, I.;  Cifrek, M.
Favorite |  | TC[WOS]:0 TC[Scopus]:7 | Submit date：2018/11/06
15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads with and without Gain Compensation Journal article
IEEE transactions on biomedical circuits and systems, 2013,Page: 690-702
Authors:  Zhang, T.T.;  Mak, P. I.;  Vai, M. I.;  Mak, P. U.;  Law, M. K.;  Pun, S. H.;  Wan, F.;  Martins, R. P.
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Biomedical  biopotential  body effect  CMOS  gain compensation  harmonic distortion  lowpass filter  MOSFET  source follower  subthreshold  time constant  transconductor  
Phase Information Enhanced SSVEP-BCI Using a Canonical Correlation Analysis Neural Network Conference paper
the Proceedings of the 5th International Brain-Computer Interface (BCI) Meeting, CA, USA, June 3-7, 2013
Authors:  C. M. Wong;  F. Wan;  K. F. Lao;  M. I. Vai
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date：2019/03/20