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Numerical investigation of the effect of laser shock peening parameters on the residual stress and deformation response of 7075 aluminum alloy Journal article
Optik, 2021,Volume: 243
Authors:  Xiang, Y. F.;  Mei, R. L.;  Wang, S. P.;  Azad, F.;  Zhao, L. Z.;  Su, S. C.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/17
ABAQUS  Finite element simulation  Laser shot peening  Residual stress  
A Sub-0.25pJ/bit 47.6-to-58.8Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR with a Deliberately-Current-Mismatch Frequency Acquisition Technique in 28nm CMOS Conference paper
Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Wang, Lin;  Mak, Pui In;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
4-level pulse amplitude modulation (PAM-4)  Bang-bang clock and data recovery (BBCDR)  Charge pump (CP)  CMOS  Frequency detector (FD)  Half-rate  Negative (NNC) net current  Positive (PNC)  Reference less  Single loop  Zero (ZNC)  
LncRNA DANCR represses Doxorubicin-induced apoptosis through stabilizing MALAT1 expression in colorectal cancer cells Journal article
Cell Death and Disease, 2021,Volume: 12,Issue: 1
Authors:  Xiong,Minmin;  Wu,Mengshi;  Dan Peng,;  Huang,Weijun;  Chen,Zehong;  Ke,Haoxian;  Chen,Zewen;  Song,Wu;  Zhao,Yonghua;  Xiang,Andy P.;  Zhong,Xiaomin
Favorite |  | TC[WOS]:2 TC[Scopus]:2 | Submit date:2021/03/02
A 10MHz Buck Converter with Type-III Control and Transient Enhancement Transistor Conference paper
Proceedings of 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2020
Authors:  Zhao,Shuangxing;  Lu,Yan;  Zhan,Chenchang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
buck converter  fast transient  transient enhanced transistor  
A 4-μm diameter SPAD using less-doped N-Well guard ring in baseline 65-nm CMOS Journal article
IEEE Transactions on Electron Devices, 2020,Volume: 67,Issue: 5,Page: 2223-2225
Authors:  Lu,Xin;  Law,Man Kay;  Jiang,Yang;  Zhao,Xiaojin;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:3 | Submit date:2021/03/04
Baseline CMOS  premature lateral breakdown  single-photon avalanche diode (SPAD)  small pitch  
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/μs Acquisition Speed of PAM-4 data in 28nm CMOS Conference paper
Proceedings of the Custom Integrated Circuits Conference
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2021/03/04
acquisition speed  Alexander phase detector (PD)  bang-bang  bang-bang clock and data recovery (CDR)  charge pump (CP)  frequency detector (FD)  full-rate  jitter tolerance (JTF)  jitter transfer function (JTF)  Single loop  strobe point (SP)  
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/09
bang- bang clock and data recovery (BBCDR)  bang-bang phase detector (BBPD)  CMOS  four- and eight-level pulse amplitude modulation (PAM-4/-8)  half rate  Hogge and Alexander PD  jitter tolerance (JTOL).  jitter transfer function (JTF)  non-return-to-zero (NRZ)  StrongARM comparator  
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS Conference paper
Proceedings - APCCAS 2019: 2019 IEEE Asia Pacific Conference on Circuits and Systems: Innovative CAS Towards Sustainable Energy and Technology Disruption
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/09
4-/8-level pulse amplitude modulation (PAM-4/8)  bang-bang phase detector (BBPD)  clock and data recovery (CDR)  half rate  non-return to zero (NRZ)  StrongARM comparator  voltage-to-current (V/I) converter  XOR  
Analysis and verification of jitter in bang-bang clock and data recovery circuit with a second-order loop filter Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019,Volume: 27,Issue: 10,Page: 2223-2236
Authors:  Ge,Xinyi;  Chen,Yong;  Zhao,Xiaoteng;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:8 TC[Scopus]:8 | Submit date:2021/03/09
Bang-bang clock and data recovery (BBCDR)  bang-bang phase detector (BBPD)  binary  Fourier series  jitter generation (JGEN)  jitter tolerance (JTOL)  jitter transfer function (JTF)  linear phase detector  loop filter (LF)  sinking area  
A 0.0018-mm2 153% locking-range CML-Based divider-by-2 with tunable self-resonant frequency using an auxiliary negative-gm Cell Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 9,Page: 3330-3339
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:4 TC[Scopus]:6 | Submit date:2021/03/09
5G New Radio  CMOS  current-mode-logic (CML)  divider-by-2  injection locking  latch  locking range (LR)  negative-gm (NG)  phasor diagram  self-resonant frequency (fSR)  sensitivity curve (SC)  shunt peaking